Use vec_revb when POWER9 is available
parent
4020ba7058
commit
39aaec7c59
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@ -64,7 +64,7 @@ bool CPU_ProbePower8()
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{
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// POWER8 added 64-bit SIMD operations
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const word64 x = W64LIT(0xffffffffffffffff);
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word64 w1[2] = {x, x}, w2[2] = {4, 6}, w3[2];
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word64 w1[2] = {x, x}, w2[2] = {4, 6}, w3[2];
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// Specifically call the VSX loads and stores with 64-bit types
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#if defined(__ibmxl__) || (defined(_AIX) && defined(__xlC__))
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@ -123,8 +123,12 @@ inline uint32x4_p VecOne()
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template <class T>
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inline T VecReverse(const T data)
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{
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#if (_ARCH_PWR9)
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return (T)vec_revb((uint8x16_p)data);
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#else
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const uint8x16_p mask = {15,14,13,12, 11,10,9,8, 7,6,5,4, 3,2,1,0};
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return (T)vec_perm(data, data, mask);
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#endif
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}
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//////////////////////// Loads ////////////////////////
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@ -723,7 +727,7 @@ inline void VecStoreBE(const T data, int off, byte dest[16])
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template <class T>
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inline void VecStoreBE(const T data, word32 dest[4])
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{
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return VecStoreBE((uint8x16_p)data, (byte*)dest);
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return VecStoreBE((uint8x16_p)data, (byte*)dest);
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}
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/// \brief Stores a vector to a word array
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@ -745,7 +749,7 @@ inline void VecStoreBE(const T data, word32 dest[4])
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template <class T>
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inline void VecStoreBE(const T data, int off, word32 dest[4])
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{
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return VecStoreBE((uint8x16_p)data, (byte*)dest);
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return VecStoreBE((uint8x16_p)data, (byte*)dest);
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}
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//////////////////////// Miscellaneous ////////////////////////
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