Fix SunCC 12.2 compiler crash with GCM_Xor16_SSE2
SunCC 12.3 through 12.5 still cannot handle CLMUL, though. It would be nice if Sun fixed the regression.pull/548/head
Jeffrey Walton
parent
6f83a4fb7d
commit
8b52a03d08
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@ -273,9 +273,13 @@ ifeq ($(SUN_COMPILER),1)
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ARIA_FLAG = -xarch=ssse3 -D__SSSE3__=1
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LDFLAGS += -xarch=ssse3
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endif
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COUNT := $(shell $(CXX) $(CXXFLAGS) -E -xarch=sse4_1 -xdumpmacros /dev/null 2>&1 | $(GREP) -i -c "illegal")
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ifeq ($(COUNT),0)
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BLAKE2_FLAG = -xarch=sse4_1 -D__SSE4_1__=1
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LDFLAGS += -xarch=sse4_1
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endif
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COUNT := $(shell $(CXX) $(CXXFLAGS) -E -xarch=sse4_2 -xdumpmacros /dev/null 2>&1 | $(GREP) -i -c "illegal")
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ifeq ($(COUNT),0)
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BLAKE2_FLAG = -xarch=sse4_2 -D__SSE4_2__=1
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CRC_FLAG = -xarch=sse4_2 -D__SSE4_2__=1
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LDFLAGS += -xarch=sse4_2
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endif
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7
cpu.cpp
7
cpu.cpp
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@ -247,7 +247,8 @@ static bool CPU_ProbeSSE2()
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bool CRYPTOPP_SECTION_INIT g_x86DetectionDone = false;
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bool CRYPTOPP_SECTION_INIT CRYPTOPP_SECTION_INIT g_hasSSE2 = false, CRYPTOPP_SECTION_INIT g_hasSSSE3 = false;
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bool CRYPTOPP_SECTION_INIT g_hasSSE41 = false, CRYPTOPP_SECTION_INIT g_hasSSE42 = false;
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bool CRYPTOPP_SECTION_INIT g_hasAESNI = false, CRYPTOPP_SECTION_INIT g_hasCLMUL = false, CRYPTOPP_SECTION_INIT g_hasSHA = false;
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bool CRYPTOPP_SECTION_INIT g_hasAESNI = false, CRYPTOPP_SECTION_INIT g_hasCLMUL = false;
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bool CRYPTOPP_SECTION_INIT g_hasADX = false, CRYPTOPP_SECTION_INIT g_hasSHA = false;
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bool CRYPTOPP_SECTION_INIT g_hasRDRAND = false, CRYPTOPP_SECTION_INIT g_hasRDSEED = false, CRYPTOPP_SECTION_INIT g_isP4 = false;
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bool CRYPTOPP_SECTION_INIT g_hasPadlockRNG = false, CRYPTOPP_SECTION_INIT g_hasPadlockACE = false, CRYPTOPP_SECTION_INIT g_hasPadlockACE2 = false;
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bool CRYPTOPP_SECTION_INIT g_hasPadlockPHE = false, CRYPTOPP_SECTION_INIT g_hasPadlockPMM = false;
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@ -301,6 +302,7 @@ void DetectX86Features()
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{
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CRYPTOPP_CONSTANT(RDRAND_FLAG = (1 << 30))
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CRYPTOPP_CONSTANT(RDSEED_FLAG = (1 << 18))
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CRYPTOPP_CONSTANT( ADX_FLAG = (1 << 19))
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CRYPTOPP_CONSTANT( SHA_FLAG = (1 << 29))
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g_isP4 = ((cpuid1[0] >> 8) & 0xf) == 0xf;
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@ -312,6 +314,7 @@ void DetectX86Features()
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if (CpuId(7, 0, cpuid2))
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{
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g_hasRDSEED = !!(cpuid2[1] /*EBX*/ & RDSEED_FLAG);
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g_hasADX = !!(cpuid2[1] /*EBX*/ & ADX_FLAG);
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g_hasSHA = !!(cpuid2[1] /*EBX*/ & SHA_FLAG);
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}
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}
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@ -320,6 +323,7 @@ void DetectX86Features()
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{
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CRYPTOPP_CONSTANT(RDRAND_FLAG = (1 << 30))
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CRYPTOPP_CONSTANT(RDSEED_FLAG = (1 << 18))
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CRYPTOPP_CONSTANT( ADX_FLAG = (1 << 19))
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CRYPTOPP_CONSTANT( SHA_FLAG = (1 << 29))
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CpuId(0x80000005, 0, cpuid2);
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@ -331,6 +335,7 @@ void DetectX86Features()
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if (CpuId(7, 0, cpuid2))
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{
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g_hasRDSEED = !!(cpuid2[1] /*EBX*/ & RDSEED_FLAG);
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g_hasADX = !!(cpuid2[1] /*EBX*/ & ADX_FLAG);
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g_hasSHA = !!(cpuid2[1] /*EBX*/ & SHA_FLAG);
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}
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}
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12
cpu.h
12
cpu.h
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@ -66,6 +66,7 @@ extern CRYPTOPP_DLL bool g_hasSSE42;
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extern CRYPTOPP_DLL bool g_hasAESNI;
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extern CRYPTOPP_DLL bool g_hasCLMUL;
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extern CRYPTOPP_DLL bool g_hasSHA;
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extern CRYPTOPP_DLL bool g_hasADX;
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extern CRYPTOPP_DLL bool g_isP4;
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extern CRYPTOPP_DLL bool g_hasRDRAND;
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extern CRYPTOPP_DLL bool g_hasRDSEED;
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@ -165,6 +166,17 @@ inline bool HasSHA()
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return g_hasSHA;
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}
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//! \brief Determines ADX availability
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//! \returns true if ADX is determined to be available, false otherwise
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//! \details HasADX() is a runtime check performed using CPUID
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//! \note This function is only available on Intel IA-32 platforms
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inline bool HasADX()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasADX;
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}
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//! \brief Determines if the CPU is an Intel P4
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//! \returns true if the CPU is a P4, false otherwise
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//! \details IsP4() is a runtime check performed using CPUID
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17
gcm-simd.cpp
17
gcm-simd.cpp
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@ -30,6 +30,10 @@
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# undef CRYPTOPP_ARM_PMULL_AVAILABLE
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#endif
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#if (CRYPTOPP_SSE2_INTRIN_AVAILABLE)
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# include <emmintrin.h>
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#endif
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#if (CRYPTOPP_CLMUL_AVAILABLE)
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# include <tmmintrin.h>
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# include <wmmintrin.h>
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@ -428,6 +432,19 @@ void GCM_ReverseHashBufferIfNeeded_PMULL(byte *hashBuffer)
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}
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#endif
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#if CRYPTOPP_SSE2_INTRIN_AVAILABLE || CRYPTOPP_SSE2_ASM_AVAILABLE
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# if defined (__SUNPRO_CC)
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// SunCC 5.10-5.11 compiler crash. Move GCM_Xor16_SSE2 out-of-line, and place in
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// a source file with a SSE architecture switch. Also see GH #226 and GH #284.
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void GCM_Xor16_SSE2(byte *a, const byte *b, const byte *c)
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{
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_mm_store_si128(M128_CAST(a), _mm_xor_si128(
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_mm_load_si128(CONST_M128_CAST(b)),
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_mm_load_si128(CONST_M128_CAST(c))));
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}
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# endif
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#endif
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#if CRYPTOPP_CLMUL_AVAILABLE
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ANONYMOUS_NAMESPACE_BEGIN
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26
gcm.cpp
26
gcm.cpp
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@ -27,15 +27,15 @@
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# undef CRYPTOPP_CLMUL_AVAILABLE
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#endif
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#if (CRYPTOPP_SSE2_INTRIN_AVAILABLE)
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# include <emmintrin.h>
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#endif
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#include "gcm.h"
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#include "cpu.h"
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NAMESPACE_BEGIN(CryptoPP)
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#if (CRYPTOPP_SSE2_INTRIN_AVAILABLE)
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# include "emmintrin.h"
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#endif
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#if (CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64)
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// Different assemblers accept different mnemonics: 'movd eax, xmm0' vs
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// 'movd rax, xmm0' vs 'mov eax, xmm0' vs 'mov rax, xmm0'
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@ -77,20 +77,24 @@ static inline void Xor16(byte *a, const byte *b, const byte *c)
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}
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#if CRYPTOPP_SSE2_INTRIN_AVAILABLE || CRYPTOPP_SSE2_ASM_AVAILABLE
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// SunCC 5.10-5.11 compiler crash. Move GCM_Xor16_SSE2 out-of-line, and place in
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// a source file with a SSE architecture switch. Also see GH #226 and GH #284.
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# if defined (__SUNPRO_CC)
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extern void GCM_Xor16_SSE2(byte *a, const byte *b, const byte *c);
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# else
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static inline void GCM_Xor16_SSE2(byte *a, const byte *b, const byte *c)
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{
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// SunCC 5.14 crash. Also see http://github.com/weidai11/cryptopp/issues/226
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// and http://github.com/weidai11/cryptopp/issues/284
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# if CRYPTOPP_SSE2_ASM_AVAILABLE && !defined(__SUNPRO_CC)
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# if CRYPTOPP_SSE2_ASM_AVAILABLE
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asm ("movdqa %1, %%xmm0; pxor %2, %%xmm0; movdqa %%xmm0, %0;"
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: "=m" (a[0]) : "m"(b[0]), "m"(c[0]));
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# else // CRYPTOPP_SSE2_INTRIN_AVAILABLE
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: "=m" (a[0]) : "rm"(b[0]), "rm"(c[0]));
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# else // CRYPTOPP_SSE2_INTRIN_AVAILABLE
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_mm_store_si128(M128_CAST(a), _mm_xor_si128(
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_mm_load_si128(CONST_M128_CAST(b)),
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_mm_load_si128(CONST_M128_CAST(c))));
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# endif
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# endif
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}
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#endif
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# endif // SunCC
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#endif // SSE2
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#if CRYPTOPP_CLMUL_AVAILABLE
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extern void GCM_SetKeyWithoutResync_CLMUL(const byte *hashKey, byte *mulTable, unsigned int tableSize);
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