Add ARM-64 defines for CRYPTOPP_L1_CACHE_LINE_SIZE

pull/174/head
Jeffrey Walton 2016-05-20 16:28:55 -04:00
parent 38f87d3cfc
commit 9534ce5bc5
2 changed files with 2 additions and 2 deletions

View File

@ -292,7 +292,7 @@ NAMESPACE_END
#ifndef CRYPTOPP_L1_CACHE_LINE_SIZE
// This should be a lower bound on the L1 cache line size. It's used for defense against timing attacks.
// Also see http://stackoverflow.com/questions/794632/programmatically-get-the-cache-line-size.
#if defined(_M_X64) || defined(__x86_64__) || (__ILP32__ >= 1)
#if defined(_M_X64) || defined(__x86_64__) || (__ILP32__ >= 1) || (__arm64__) || (__aarch64__)
#define CRYPTOPP_L1_CACHE_LINE_SIZE 64
#else
// L1 cache line size is 32 on Pentium III and earlier

View File

@ -292,7 +292,7 @@ NAMESPACE_END
#ifndef CRYPTOPP_L1_CACHE_LINE_SIZE
// This should be a lower bound on the L1 cache line size. It's used for defense against timing attacks.
// Also see http://stackoverflow.com/questions/794632/programmatically-get-the-cache-line-size.
#if defined(_M_X64) || defined(__x86_64__) || (__ILP32__ >= 1)
#if defined(_M_X64) || defined(__x86_64__) || (__ILP32__ >= 1) || (__arm64__) || (__aarch64__)
#define CRYPTOPP_L1_CACHE_LINE_SIZE 64
#else
// L1 cache line size is 32 on Pentium III and earlier