Add ARM-64 defines for CRYPTOPP_L1_CACHE_LINE_SIZE
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38f87d3cfc
commit
9534ce5bc5
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config.h
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config.h
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@ -292,7 +292,7 @@ NAMESPACE_END
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#ifndef CRYPTOPP_L1_CACHE_LINE_SIZE
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// This should be a lower bound on the L1 cache line size. It's used for defense against timing attacks.
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// Also see http://stackoverflow.com/questions/794632/programmatically-get-the-cache-line-size.
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#if defined(_M_X64) || defined(__x86_64__) || (__ILP32__ >= 1)
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#if defined(_M_X64) || defined(__x86_64__) || (__ILP32__ >= 1) || (__arm64__) || (__aarch64__)
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#define CRYPTOPP_L1_CACHE_LINE_SIZE 64
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#else
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// L1 cache line size is 32 on Pentium III and earlier
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@ -292,7 +292,7 @@ NAMESPACE_END
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#ifndef CRYPTOPP_L1_CACHE_LINE_SIZE
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// This should be a lower bound on the L1 cache line size. It's used for defense against timing attacks.
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// Also see http://stackoverflow.com/questions/794632/programmatically-get-the-cache-line-size.
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#if defined(_M_X64) || defined(__x86_64__) || (__ILP32__ >= 1)
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#if defined(_M_X64) || defined(__x86_64__) || (__ILP32__ >= 1) || (__arm64__) || (__aarch64__)
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#define CRYPTOPP_L1_CACHE_LINE_SIZE 64
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#else
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// L1 cache line size is 32 on Pentium III and earlier
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