diff --git a/blake2-simd.cpp b/blake2-simd.cpp
index 0d194034..09650038 100644
--- a/blake2-simd.cpp
+++ b/blake2-simd.cpp
@@ -11,6 +11,11 @@
 #include "misc.h"
 #include "blake2.h"
 
+// Uncomment for benchmarking C++ against SSE2 or NEON.
+// Do so in both blake2.cpp and blake2-simd.cpp.
+// #undef CRYPTOPP_SSE42_AVAILABLE
+// #undef CRYPTOPP_ARM_NEON_AVAILABLE
+
 #if !(defined(__ARM_NEON) || defined(_MSC_VER))
 # undef CRYPTOPP_ARM_NEON_AVAILABLE
 #endif
diff --git a/blake2.cpp b/blake2.cpp
index b8d4960c..fe237fba 100644
--- a/blake2.cpp
+++ b/blake2.cpp
@@ -12,7 +12,8 @@
 
 NAMESPACE_BEGIN(CryptoPP)
 
-// Uncomment for benchmarking C++ against SSE2 or NEON
+// Uncomment for benchmarking C++ against SSE2 or NEON.
+// Do so in both blake2.cpp and blake2-simd.cpp.
 // #undef CRYPTOPP_SSE42_AVAILABLE
 // #undef CRYPTOPP_ARM_NEON_AVAILABLE
 
diff --git a/cpu.h b/cpu.h
index 66336489..5e2cca86 100644
--- a/cpu.h
+++ b/cpu.h
@@ -80,6 +80,9 @@ CRYPTOPP_DLL void CRYPTOPP_API DetectX86Features();
 CRYPTOPP_DLL bool CRYPTOPP_API CpuId(word32 func, word32 subfunc, word32 output[4]);
 #endif // CRYPTOPP_DOXYGEN_PROCESSING
 
+//! \name IA-32 CPU FEATURES
+//@{
+
 //! \brief Determines SSE2 availability
 //! \returns true if SSE2 is determined to be available, false otherwise
 //! \details MMX, SSE and SSE2 are core processor features for x86_64, and
@@ -264,6 +267,8 @@ inline int GetCacheLineSize()
 		DetectX86Features();
 	return g_cacheLineSize;
 }
+//@}
+
 #endif  // CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
 
 // ***************************** ARM-32, Aarch32 and Aarch64 ***************************** //
@@ -277,6 +282,9 @@ extern bool g_hasNEON, g_hasPMULL, g_hasCRC32, g_hasAES, g_hasSHA1, g_hasSHA2;
 void CRYPTOPP_API DetectArmFeatures();
 #endif  // CRYPTOPP_DOXYGEN_PROCESSING
 
+//! \name ARM A-32, Aarch32 and AArch64 CPU FEATURES
+//@{
+
 //! \brief Determine if an ARM processor has Advanced SIMD available
 //! \returns true if the hardware is capable of Advanced SIMD at runtime, false otherwise.
 //! \details Advanced SIMD instructions are available under most ARMv7, Aarch32 and Aarch64.
@@ -389,6 +397,9 @@ inline bool HasSHA2()
 	return false;
 #endif
 }
+
+//@}
+
 #endif  // CRYPTOPP_BOOL_ARM32 || CRYPTOPP_BOOL_ARM64
 
 // ***************************** PowerPC ***************************** //
@@ -403,6 +414,9 @@ extern word32 g_cacheLineSize;
 void CRYPTOPP_API DetectPowerpcFeatures();
 #endif  // CRYPTOPP_DOXYGEN_PROCESSING
 
+//! \name POWERPC CPU FEATURES
+//@{
+
 //! \brief Determine if a PowerPC processor has Altivec available
 //! \returns true if the hardware is capable of Altivec at runtime, false otherwise.
 //! \details Altivec instructions are available under most modern PowerPCs.
@@ -511,6 +525,8 @@ inline int GetCacheLineSize()
 	return g_cacheLineSize;
 }
 
+//@}
+
 #endif  // CRYPTOPP_BOOL_PPC32 || CRYPTOPP_BOOL_PPC64
 
 // ***************************** L1 cache line ***************************** //