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Fix Asan 64-bit build 

The Padlock SDK sample code leaves a lot to be desired. Regariding the 64-bit samples and instr_linux64.asm... it looks like the sample sill uses 32-bit constants, but most anything related to extended registers, like rdi, is commented out
pull/462/head
Jeffrey Walton 2017-08-20 11:19:32 -04:00
parent 3db6f361d2
commit bac3c1cc40
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GPG Key ID: B36AB348921B1838
1 changed files with 12 additions and 2 deletions
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14
padlkrng.cpp
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@ -32,13 +32,23 @@ void PadlockRNG::GenerateBlock(byte *output, size_t size)
{ {
__asm__ __volatile__ __asm__ __volatile__
( (
"movl %1, %%edi ;\n" #if (CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64)
"mov %1, %%rdi ;\n"
"movl %2, %%edx ;\n" "movl %2, %%edx ;\n"
#else
"mov %1, %%edi ;\n"
"movl %2, %%edx ;\n"
#endif
".byte 0x0f, 0xa7, 0xc0 ;\n" ".byte 0x0f, 0xa7, 0xc0 ;\n"
"movl %%eax, %0 ;\n" "movl %%eax, %0 ;\n"
: "=g" (m_msr) : "g" (m_buffer.data()), "g" (m_divisor) : "=g" (m_msr) : "g" (m_buffer.data()), "g" (m_divisor)
#if (CRYPTOPP_BOOL_X3 || CRYPTOPP_BOOL_X64)
: "eax", "edx", "rdi", "cc"
#else
: "eax", "edx", "edi", "cc" : "eax", "edx", "edi", "cc"
#endif
); );
const size_t ret = m_msr & 0x1f; const size_t ret = m_msr & 0x1f;
@ -46,7 +56,7 @@ void PadlockRNG::GenerateBlock(byte *output, size_t size)
std::memcpy(output, m_buffer, rem); std::memcpy(output, m_buffer, rem);
size -= rem; output += rem; size -= rem; output += rem;
} }
#elif defined(CRYPTOPP_X86_ASM_AVAILABLE) && defined(_MSC_VER) #elif defined(CRYPTOPP_X86_ASM_AVAILABLE) && defined(_MSC_VER) && defined(_M_IX86)
while (size) while (size)
{ {
word32 result, divisor = m_divisor; word32 result, divisor = m_divisor;