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Add code for VIA L1 data cache line size

pull/838/head
Jeffrey Walton 2019-05-08 18:29:33 -04:00
parent 30fc56d58c
commit d9aed27ad3
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GPG Key ID: B36AB348921B1838
1 changed files with 17 additions and 5 deletions
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22
cpu.cpp
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@ -290,10 +290,14 @@ static inline bool IsHygon(const word32 output[4])
static inline bool IsVIA(const word32 output[4])
{
// This is the "CentaurHauls" string. Some non-PadLock's can return "VIA VIA VIA "
return (output[1] /*EBX*/ == 0x746e6543) &&
// This is the "CentaurHauls" string.
return ((output[1] /*EBX*/ == 0x746e6543) &&
(output[2] /*ECX*/ == 0x736c7561) &&
(output[3] /*EDX*/ == 0x48727561);
(output[3] /*EDX*/ == 0x48727561)) ||
// Some non-PadLock's return "VIA VIA VIA "
((output[1] /*EBX*/ == 0x32414956) &&
(output[2] /*ECX*/ == 0x32414956) &&
(output[3] /*EDX*/ == 0x32414956));
}
void DetectX86Features()
@ -425,6 +429,7 @@ void DetectX86Features()
}
else if (IsVIA(cpuid0))
{
// Two bits: available and enabled
CRYPTOPP_CONSTANT( RNG_FLAGS = (0x3 << 2))
CRYPTOPP_CONSTANT( ACE_FLAGS = (0x3 << 6))
CRYPTOPP_CONSTANT(ACE2_FLAGS = (0x3 << 8))
@ -432,9 +437,10 @@ void DetectX86Features()
CRYPTOPP_CONSTANT( PMM_FLAGS = (0x3 << 12))
CpuId(0xC0000000, 0, cpuid2);
if (cpuid2[0] >= 0xC0000001)
word32 extendedFeatures = cpuid2[0];
if (extendedFeatures >= 0xC0000001)
{
// Extended features available
CpuId(0xC0000001, 0, cpuid2);
g_hasPadlockRNG = (cpuid2[3] /*EDX*/ & RNG_FLAGS) == RNG_FLAGS;
g_hasPadlockACE = (cpuid2[3] /*EDX*/ & ACE_FLAGS) == ACE_FLAGS;
@ -442,6 +448,12 @@ void DetectX86Features()
g_hasPadlockPHE = (cpuid2[3] /*EDX*/ & PHE_FLAGS) == PHE_FLAGS;
g_hasPadlockPMM = (cpuid2[3] /*EDX*/ & PMM_FLAGS) == PMM_FLAGS;
}
if (extendedFeatures >= 0xC0000005)
{
CpuId(0xC0000005, 0, cpuid2);
g_cacheLineSize = GETBYTE(cpuid2[2] /*ECX*/, 0);
}
}
if (g_cacheLineSize == 0)