Commit Graph

44 Commits (1de4f39f86f7cd673f0e3d9bb3d250a86b4b5641)

Author SHA1 Message Date
Jeffrey Walton 4282f94712
Disable X32 inline assembly (GH #686, PR #704)
Also use CRYPTOPP_DISABLE_XXX_ASM consistently. The pattern is needed for Clang which still can't compile Intel assembly language. Also see http://llvm.org/bugs/show_bug.cgi?id=24232.
2018-08-18 04:44:53 -04:00
Jeffrey Walton d109ce09d0
Update comments and function names
Someone trying to make sense of POWER8 GCM is bound to be confused even with the expanded comments and updated function names
2018-08-11 06:40:21 -04:00
Jeffrey Walton 6993d1d0bd
Update comments 2018-08-11 00:55:52 -04:00
Jeffrey Walton 94eff2cdd6
Remove INLINE used for debugging
We needed to switch inlining off manually. GDB was not stepping into code for us. No longer needed
2018-08-10 05:19:08 -04:00
Jeffrey Walton 23e0ee44a0
Cleanup GCM code
I always thought the SSE code in GCM_ReverseHashBufferIfNeeded_CLMUL was a wart
2018-08-10 04:42:30 -04:00
Jeffrey Walton 1c224c8798
Switch to vector shifts instead of vector merge 2018-08-10 04:27:49 -04:00
Jeffrey Walton a2a520e5b9
Cleanup GCM mode 2018-08-10 01:57:14 -04:00
Jeffrey Walton b44de10e18
Cleanup Aarch64 GCM mode 2018-08-10 01:00:26 -04:00
Jeffrey Walton 9f2d65409a
Add POWER8 GCM mode (GH #698)
Commit 3ed38e42f6 added the POWER8 infrastructure for GCM mode. It also added GCM_SetKeyWithoutResync_VMULL, GCM_Multiply_VMULL and GCM_Reduce_VMULL. This commit adds the remainder, which includes GCM_AuthenticateBlocks_VMULL.
GCC is OK on Linux (ppc64-le) and AIX (ppc64-be). We may need some touchups for XLC compiler
2018-08-09 23:28:49 -04:00
Jeffrey Walton 989c3bfbf2
Update comments 2018-08-09 18:18:40 -04:00
Jeffrey Walton 3ed38e42f6
Add POWER8 GCM mode (GH #698)
GCM_SetKeyWithoutResync_VMULL, GCM_Multiply_VMULL and GCM_Reduce_VMULL work as expected on Linux (ppc64-le) and AIX (ppc64-be). We are still working on GCM_AuthenticateBlocks_VMULL.
2018-08-09 08:09:13 -04:00
Jeffrey Walton a4ebb75538
Update comments 2018-08-06 18:37:25 -04:00
Jeffrey Walton 194307308c
Cleanup VPMSUM probes 2018-08-06 18:06:32 -04:00
Jeffrey Walton 2ec9c9963c
Update documentation 2018-08-06 06:47:57 -04:00
Jeffrey Walton 9ff731824b
Prepare for POWER8 carryless multiplies using vpmsum 2018-08-06 05:40:38 -04:00
Jeffrey Walton 9c27143522
Whitespace check-in 2018-08-05 13:31:25 -04:00
Jeffrey Walton 076d0cd604
Remove s_clmulConstants table in GCM mode
Local scopes and loading the constants with _mm_set_epi32 saves about 0.03 cpb. It does not sound like much but it improves GMAC by about 500 MB/s. GMAC is just shy of 8 GB/s.
2018-07-16 19:04:24 -04:00
Jeffrey Walton c9d53ad340
Fix "error C2719: formal parameter with requested alignment of 16 won't be aligned"
This was somewhat expected due to the Solaris knob turning.
2018-07-16 17:09:26 -04:00
Jeffrey Walton 9d954efcde
Disable CLMUL again on SunStudio (GH# 188, GH #224)
We got reports that x86_64 was producing incorrect results. Also, the problem persisted in i386 builds. I don't think we can work around this issue. Oracle must fix it.
2018-07-16 09:39:01 -04:00
Jeffrey Walton a0166d9546
Fix SunStudio 12.4 compile on Solaris 2018-07-16 04:42:52 -04:00
Jeffrey Walton eb55cc0ae5
Fix SunStudio 12.6 GCM compile on Solaris (GH #188, GH #224)
I think we have this issue somewhat sorted out. First, there is a compiler bug. Second, it seems to be triggered when function parameters mix const and non-const references. Third, to work around it, all parameters need to be non-const (as in this patch).
I'm really glad we kind of got to the bottom of things. The crash when compiling GCM has been bothering me for nearly 3 years.
2018-07-15 22:31:50 -04:00
Jeffrey Walton 339cc240a2
Fix SunStudio compile on Solaris (GH #226) 2018-07-15 19:26:15 -04:00
Jeffrey Walton 4e3a1ea962
Add ARMv8.4 cpu feature detection support (GH #685) (#687)
This PR adds ARMv8.4 cpu feature detection support. Previously we only needed ARMv8.1 and things were much easier. For example, ARMv8.1 `__ARM_FEATURE_CRYPTO` meant PMULL, AES, SHA-1 and SHA-256 were available. ARMv8.4 `__ARM_FEATURE_CRYPTO` means PMULL, AES, SHA-1, SHA-256, SHA-512, SHA-3, SM3 and SM4 are  available. 

We still use the same pattern as before. We make something available based on compiler version and/or preprocessor macros. But this time around we had to tighten things up a bit to ensure ARMv8.4 did not cross-pollinate down into ARMv8.1.

ARMv8.4 is largely untested at the moment. There is no hardware in the field and CI lacks QEMU with the relevant patches/support. We will probably have to revisit some of this stuff in the future.

Since this update applies to ARM gadgets we took the time to expand Android and iOS testing on Travis. Travis now tests more platforms, and includes Autotools and CMake builds, too.
2018-07-15 08:35:14 -04:00
Jeffrey Walton 3dcceb55f5
Squash MS LNK4221 and libtool warnings 2018-07-06 03:46:25 -04:00
Ilja f8a1f50383 Remove extra ; from gcm-simd.cpp (PR #618) 2018-03-31 13:05:45 -04:00
Jeffrey Walton 565bd844fc
Clear GCC -Wcast-align warnings on ARM
The buffers and workspaces are aligned
2018-01-20 19:39:49 -05:00
Jeffrey Walton 5cee4a6573
Improve logic for <arm_acle.h> include (GH #568) 2018-01-20 13:23:41 -05:00
Jeffrey Walton 0e32a7f1e6
Fix "Internal compiler error: max number of generated reload insns ..." (GH #554) 2018-01-07 10:53:15 -05:00
Jeffrey Walton 9c80a706c8
Fix "impossible register constraint in ASM" (GH #554)
Thanks to Eduardo Miravalls for reporting the issue
2018-01-02 10:51:16 -05:00
Jeffrey Walton 16290b2f1c Fix crash on VIA C7-D when using GCM
This was interesting... The C&-D is an early 2000's 32-bit processor with SSE2 and SSSE3. Using a destination register constraint of "xm" witnessed a crash, while a constraint of "m" does not
2017-11-24 07:08:41 -05:00
Jeffrey Walton c3107d2519
Fix "impossible constraint in \\asm\" on i686
gcm.cpp:89:50: error: impossible constraint in \\asm\
          : "=xm" (a[0]) : "xm"(b[0]), "xm"(c[0]));
2017-11-24 05:49:56 -05:00
Jeffrey Walton 8b52a03d08
Fix SunCC 12.2 compiler crash with GCM_Xor16_SSE2
SunCC 12.3 through 12.5 still cannot handle CLMUL, though. It would be nice if Sun fixed the regression.
2017-11-16 02:38:53 -05:00
Jeffrey Walton 6f83a4fb7d
Switch to intrinsic operation instead of casts for GCM SSE2 XOR's 2017-11-15 23:05:30 -05:00
Jeffrey Walton c7a7385d52
Clear missing newline warning 2017-10-12 14:02:26 -04:00
Jeffrey Walton 6102333fc3
Add CRYPTOPP_NO_CPU_FEATURE_PROBES (GH #511)
We determine machine capabilities by performing an os/platform *query* first, like getauxv(). If the *query* fails, we move onto a cpu *probe*. The cpu *probe* tries to exeute an instruction and then catches a SIGILL on Linux or the exception EXCEPTION_ILLEGAL_INSTRUCTION on Windows. Some OSes fail to hangle a SIGILL gracefully, like Apple OSes. Apple machines corrupt memory and variables around the probe.
2017-09-19 21:08:37 -04:00
Jeffrey Walton f0c2324f6b
Fix armeabi and armv7-a for Android (GH #509) 2017-09-17 20:07:53 -04:00
Jeffrey Walton 8d98417306
Add Aarch64 specific defines to Android cross-compile
Move <arm_acle.h> logic into "sonfig.h". Detecting when we can/should include <arm_acle.h> is proving to be troublesome
2017-09-13 17:16:57 -04:00
Jeffrey Walton 17bf824790
Guard <arm_acle.h> include for GCC 4.8
Use system includes for <arm_neon.h> and <arm_acle.h>
2017-09-12 05:29:51 -04:00
Jeffrey Walton 7c667bc71e
Fix SunCC crash when compiling GCM 2017-08-27 06:16:04 -04:00
Jeffrey Walton 5c6a32ba0f
Support Base Implementation + SIMD implementation on Solaris (PR #461) 2017-08-24 19:17:21 -04:00
Jeffrey Walton 7851a0d510 Remove BOOL macro value (GH #462)
Currently the CRYPTOPP_BOOL_XXX macros set the macro value to 0 or 1. If we remove setting the 0 value (the #else part of the expression), then the self tests speed up by about 0.3 seconds. I can't explain it, but I have observed it repeatedly.
This check-in prepares for the removal in Upstream master
2017-08-20 21:25:29 -04:00
Jeffrey Walton a1b3102eab
Update comments 2017-08-19 01:35:36 -04:00
Jeffrey Walton 51fe8a7776
Guard use of SIGILL probes on Apple platforms 2017-08-17 18:06:57 -04:00
Jeffrey Walton e2c377effd Split source files to support Base Implementation + SIMD implementation (GH #461)
Split source files to support Base Implementation + SIMD implementation
2017-08-17 12:33:43 -04:00