e56caf72ec
Fix unwanted Git mode change
2017-12-15 19:13:20 -05:00
7aa3377bbd
Prepare for changes to support latest NDK liek r16 (GH #546 )
2017-12-15 19:10:02 -05:00
93f6901119
Avoid including <arm_acle.h> on Android (GH #546 )
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It sure would be nice if everyone just followed the ACLE guidlines at http://infocenter.arm.com/help/topic/com.arm.doc.ihi0053c/IHI0053C_acle_2_0.pdf
2017-12-15 17:00:39 -05:00
43a34590a9
Add Altivec detection for PowerMac
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We now need to detect Altivec/Power4. Formerly it did not matter so CPU_QueryAltivec simply returned false
2017-12-13 11:49:35 -05:00
e1c9746b70
Fix Power8 compile under GCC
2017-12-12 10:52:57 -05:00
57e3ae309b
Update documentation
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Remove typedefs
Whitespace check-in
2017-12-12 09:22:03 -05:00
2c79be7a54
Add CRYPTOPP_POWER5_AVAILABLE
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Power4 lacks 'vector long long'
Rename datatypes such as 'uint8x16_p8' to 'uint8x16_p'. Originally the p8 suffix indicated use with Power8 in-core crypto. We are now using Altivec/Power4 for general vector operations.
2017-12-12 08:17:17 -05:00
ca54d0c7da
Add CRYPTOPP_POWER5_AVAILABLE
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Power4 lacks 'vector long long'
Rename datatypes such as 'uint8x16_p8' to 'uint8x16_p'. Originally the p8 suffix indicated use with Power8 in-core crypto. We are now using Altivec/Power4 for general vector operations.
2017-12-12 08:14:53 -05:00
15d637771f
Add CRYPTOPP_POWER5_AVAILABLE
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Power4 lacks 'vector long long'
Rename datatypes such as 'uint8x16_p8' to 'uint8x16_p'. Originally the p8 suffix indicated use with Power8 in-core crypto. We are now using Altivec/Power4 for general vector operations.
2017-12-12 08:09:31 -05:00
b7e636ac51
Rename ppc-crypto.h to ppc-simd.h
2017-12-12 07:15:59 -05:00
074c889210
Add NEON flags to rijndael-simd.cpp
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AES does not have a NEON implementation. However, because it includes "adv-simd.h", it needs the compiler options so NEON types are available. Otherwise the compile fails.
We can't guard "adv-simd.h" and NEON on just AES because Simon and Speck use the templates in their NEON implementations.
2017-12-10 12:11:53 -05:00
195ac2c7c9
Refactor rijndael-simd.cpp and simon.simd.cpp to use adv-simd.h
2017-12-10 11:09:50 -05:00
e90cc9a028
Update comments
2017-12-10 05:41:19 -05:00
8a5911e6eb
Refactor <cipher>_AdvancedProcessBlocks_<arch> into adv-simd.h
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This also fixes the SPECK64 bug where CTR mode self tests fail. It was an odd failure because it only affected 64-bit SPECK. SIMON was fine and it used nearly the same code. We tracked it down through trial and error to the table based rotates.
2017-12-09 21:04:25 -05:00
3ff04f1bf0
Cleanup includes for CRC32 and CRC32C
2017-12-09 13:09:49 -05:00
65222dfe9e
Move location of CRYPTOPP_ARM_ACLE_AVAILABLE test in config.h
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This should make it easier to detect when we need to include <arm_acle.h>
2017-12-09 13:07:50 -05:00
5856ab5a7e
Add Valgrind suppression file for Salsa20 and runtime's __memcmp_sse4_1
2017-12-08 17:46:44 -05:00
e457ca26f7
Add SSE3 <pmmintrin.h> for SImon and Speck
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Add additional comments for WORKAROUND_GCC_OPTERON_ISSUE
2017-12-08 13:54:00 -05:00
148202369b
Fix Speck-64 CTR mode
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It looks like the delay was due to some GCC 7 issue. We had to disable parallel blocks on Aarch64 with GCC 7. We may be running out of registers and that could be causing problems. It looks like GCC uses up to v30.
2017-12-07 22:30:03 -05:00
02037b5ce6
Fix Simon-64 CTR mode
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This fixes CTR mode for Simon-64. We were only incrementing half the counters.
We still have Speck-64 to cleanup.
2017-12-07 19:45:32 -05:00
07f2a4fc3f
Fix Simon-64 and Speck-64 CTR mode
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This fixes CTR mode for IA-32. We were only incrementing half the counters.
Added additional test vectors
2017-12-07 16:55:23 -05:00
fe257e92a9
Add const-ness to internal BLAKE2 functions (GH #527 )
2017-12-06 17:40:34 -05:00
b436411de5
Fix MSVC 2017 hang on BLAKE2 (GH #527 )
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It looks like the macros for BLAKE2B and BLAKE2S round functions were too much for the compiler to handle
2017-12-06 14:02:28 -05:00
86acc8ed45
Use 6x-2x-1x for Simon and Speck on IA-32
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For Simon-64 and Speck-64 this means we are effectively using 12x-4x-1x. We are mostly at the threshold for IA-32 and parallelization. At any time 10 to 13 XMM registers are being used.
Prefer movsd by way of _mm_load_sd and _mm_store_sd.
Fix "error C3861: _mm_cvtsi128_si64x identifier not found".
2017-12-06 06:18:46 -05:00
e9654192f2
Remove unneeded temp[] array
2017-12-05 20:35:57 -05:00
490701acca
Use 12x-4x-1x for Simon and Speck on ARM
2017-12-05 18:43:53 -05:00
7bc621da62
Enable NEON/ASIMD for Simon and Speck on Aarch32/Aarch64 (GH #545 )
2017-12-05 14:02:48 -05:00
9b61d4143d
Add big- and little-endian rotates for Aarch32 and Aarch64
2017-12-05 12:32:26 -05:00
9faa504a24
Fix Aarch32 and Aarch64 rotates
2017-12-05 11:15:26 -05:00
c18793f862
Fix SIMON-64 missing transform
2017-12-05 09:14:58 -05:00
4990ffe5b8
Add SIMON-64 NEON intrinsics
2017-12-05 08:53:57 -05:00
b208c8c1b4
Add 4 additional lanes to SPECK-64 for ARM
2017-12-05 07:16:34 -05:00
e09e6af1f8
Enable multi-block for SPECK-64 and SIMON-64
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Also cleaned up SIMON-64 vector permute code. Thanks again to Peter Cordes
2017-12-05 04:19:44 -05:00
147ecba5df
Add temp working variable for SPECK64_AdvancedProcessBlocks_SSE41
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Avoid potential undefined behavior by using aligned words
2017-12-04 14:52:36 -05:00
076937eb81
Update comments for vector permutes in SPECK-128
2017-12-04 12:31:32 -05:00
25709d2597
Fix SPECK64 vector permutes
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Thanks to Peter Cordes for the suggestion on handling the case
2017-12-04 09:47:26 -05:00
46271660a1
Switch to uint64x2_t for SIMON-128
2017-12-04 05:47:34 -05:00
e9714b40d2
Switch to _mm_unpacklo_epi32 and _mm_unpackhi_epi32
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The manual _mm_extract_epi32 and _mm_insert_epi32 are required during setup, be we can use SSE on teardown
2017-12-04 05:01:27 -05:00
cd31fa29dc
Switch to uint64x2_t for SPECK-128
2017-12-04 03:38:39 -05:00
1de143203e
Add SPECK-64 NEON intrinsics
2017-12-03 18:47:39 -05:00
cd55613b80
Disable NEON for SPECK-64
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This was inadvertently checked-in
2017-12-03 11:02:15 -05:00
f0e49785f6
Fix incorrect SPECK-128 decrypt when blocks >= 6
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Add defines for CRYPTOPP_SPECK64_ADVANCED_PROCESS_BLOCKS and CRYPTOPP_SPECK128_ADVANCED_PROCESS_BLOCKS
2017-12-03 09:00:39 -05:00
18ccd89965
Add SSE4 flags to makefile for Simon and Speck
2017-12-03 06:02:24 -05:00
081afde0fd
Add SIMON-64 SSE intrinsics
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Performance went from about 29 cpb (C++) to about 11.1 cpb (SSE)
2017-12-03 04:10:55 -05:00
6bb1f1d9c4
Add SPECK-64 SSE intrinsics
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Performance went from about 11.9 cpb (C++) to about 4.5 cpb (SSE)
2017-12-03 02:28:40 -05:00
77ff7aa528
Add additional Simon test vectors
2017-12-02 21:07:33 -05:00
ca158d56f8
Add additional Speck test vectors
2017-12-02 20:00:32 -05:00
25493ded49
Add AVX512VL rotate support
2017-12-01 09:39:05 -05:00
49a119cbf7
Add SPECK-64 and SPECK-128 large block tests
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The tests were generated using Crypto++ and the straight C++ implementation. It should allow us to test the SSE and NEON impelmentations and multiple blocks
2017-12-01 07:33:21 -05:00
3c1914b020
Add SIMON-64 and SIMON-128 large block tests
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The tests were generated using Crypto++ and the straight C++ implementation. It should allow us to test the SSE and NEON impelmentations and multiple blocks
2017-12-01 07:10:42 -05:00
Jeffrey Walton