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4380 Commits (af7cdcdbecc49b1c23cdb6994f3a811c97fd9607)

Author SHA1 Message Date
Jeffrey Walton af7cdcdbec
Update documentation 2018-11-30 05:57:02 -05:00
Jeffrey Walton b87ef5d5cf
Update documentation 2018-11-30 05:48:41 -05:00
Jeffrey Walton fd5e35fcb6
Fix SIGILL on Linux when using XLC for DARN 2018-11-30 05:28:44 -05:00
Jeffrey Walton 8fba667250
Initialize Intel intrinsic variables 2018-11-28 23:44:03 -05:00
Jeffrey Walton f07f01f415
Add Power9 Random Number Generator support (GH #747, PR #748) 
This adds the missing changes to the Windows source files
 2018-11-28 21:51:39 -05:00
Jeffrey Walton 603d37b28b
Fix type for XLC features ladder 2018-11-28 21:35:07 -05:00
Jeffrey Walton 5d9ecc2b2e
Align GNUmakefile with Autotools and CMake 2018-11-28 19:58:58 -05:00
Jeffrey Walton ee5b0562b9
Make temporary buffer a SecBlock for zeroization 2018-11-27 22:59:41 -05:00
Jeffrey Walton 09bda53fc0
Fix PowerMac compile on G4's and G5's 2018-11-27 21:17:47 -05:00
Jeffrey Walton 5685b0fdc4
Guard GCC_DARN_ASM_AVAILABLE on GCC 4.0 
The GCC inline assembler is available at GCC 3.2, but we check for 4.0 for expediency
 2018-11-27 20:47:00 -05:00
Jeffrey Walton 7a9970f02e
Update comments and cpu feature test 2018-11-27 06:34:44 -05:00
Jeffrey Walton d41085e907
Update documentation 2018-11-27 06:08:51 -05:00
Jeffrey Walton 9ddd6dc93c
Fix CPU_ProbeDARN test 
The DARN probe used 64-bit version of the instruction. I think it would have been OK  32-bit binaries, but the 32-bit version is always safe.
 2018-11-27 04:46:51 -05:00
Jeffrey Walton 3db34abf2f
Add Power9 Random Number Generator support (GH #747, PR #748) 2018-11-27 02:54:26 -05:00
Jeffrey Walton 1966d13617
Cleanup BLAKE2 m_keyLength and m_digestSize 2018-11-25 02:05:02 -05:00
Jeffrey Walton cfbe382e0c
Update documentation 2018-11-24 06:04:18 -05:00
Jeffrey Walton a00fd95032
Update documentation 2018-11-24 05:01:43 -05:00
Jeffrey Walton b6a73cadfb
Update documentation 2018-11-24 04:57:45 -05:00
Jeffrey Walton 9a987b4867
Fix compile error with GCC on POWER7 2018-11-24 04:43:14 -05:00
Jeffrey Walton 93a9bfbac2
Update documentation 2018-11-24 03:47:16 -05:00
Jeffrey Walton 758e31d5a0
Add 64-bit element rotates for POWER7 2018-11-24 03:27:12 -05:00
Jeffrey Walton cf3dfa2745
Drop uint64x2_p to POWER7 
According to the OpenPOWER specs, unsigned long long vectors first appeared in ISA 2.06, which is POWER7. However some support functions, like vec_add, did not arrive until ISA 2.07, which is POWER8.
 2018-11-24 02:53:59 -05:00
Jeffrey Walton a4dc4e2237
Update documentation 2018-11-24 02:23:25 -05:00
Jeffrey Walton ad58f0cbdc
Update comments for PowerPC 2018-11-24 02:14:28 -05:00
Jeffrey Walton 51fea1a15e
Add VecLoadAligned for PowerPC 2018-11-24 01:27:44 -05:00
Jeffrey Walton 727de927cc
Add CRYPTOPP_POWER7_ALTIVEC for XLC 12 on AIX workaround 2018-11-24 01:11:54 -05:00
Jeffrey Walton 064650d31e
Avoid IsAlignedOn in VecLoad_ALTIVEC and VecStore_ALTIVEC 2018-11-23 23:58:30 -05:00
Jeffrey Walton a48e387ead
Add missing offset to VecStoreBE 2018-11-23 15:53:58 -05:00
Jeffrey Walton 39aaec7c59
Use vec_revb when POWER9 is available 2018-11-23 12:16:45 -05:00
Jeffrey Walton 4020ba7058
Fix PowerPC compile on Linux 2018-11-22 23:20:55 -05:00
Jeffrey Walton ae5650d498
Fix PowerPC compile on Linux 2018-11-22 22:51:02 -05:00
Jeffrey Walton bc63a78b69
Move Power8 SHA tests into ppc_power8.cpp 2018-11-22 22:41:56 -05:00
Jeffrey Walton 2b5bea7b12
Fix POWER8 compile when -DCRYPTOPP_DISABLE_ALTIVEC 2018-11-22 22:23:44 -05:00
Jeffrey Walton 3efc7752e4
Remove __IBM_ATTRIBUTES 
I believe this is C++ attributes, and not GCC attributes
 2018-11-22 20:47:35 -05:00
Jeffrey Walton 3ba4dc6052
Use __IBMCPP_NULLPTR from IBM compiler manual 2018-11-22 19:44:41 -05:00
Jeffrey Walton 652d0e42bf
Use __IBM_ATTRIBUTES and __IBM_ALIGNOF__ from IBM compiler manual 2018-11-22 19:18:08 -05:00
Jeffrey Walton 2fe5177d07
Update documentation 2018-11-22 16:54:28 -05:00
Jeffrey Walton 17b7ebeb39
Update documentation 2018-11-22 16:37:41 -05:00
Jeffrey Walton f6de172367
Fix UBsan finding on PowerPC under Clang 7.0 2018-11-22 16:27:16 -05:00
Jeffrey Walton 568d9376a2 Update documentation 
Signed-off-by: Jeffrey Walton <noloader@gmail.com>
 2018-11-22 13:54:03 -05:00
Jeffrey Walton 64981be36b
Remove unneeded assert in panama.cpp 
The code handles both aligned and unaligned cases
 2018-11-22 04:28:38 -05:00
Jeffrey Walton 8d4103fb0c
Fix alignment on AIX (GH #745) 2018-11-22 00:15:37 -05:00
Jeffrey Walton 6cf8895bf1
Add additional assert to FixedSizeAllocatorWithCleanup (GH #745) 
This assert checks the array we return to the caller is large enough. Spoiler alert... it is not always large enough, like on 64-bit AIX. The linker on AIX appears to align smaller than 8-bytes
 2018-11-21 23:04:00 -05:00
Jeffrey Walton 1e8ac49b49
Guard use of _debug_memset with __DEBUG_ALLOC__ 
This is engaged with IBM XLC's -qheapdebug option
 2018-11-21 21:04:20 -05:00
Jeffrey Walton e26b1a0b2a
Add debug heap support on AIX with IBM XLC 2018-11-21 20:19:06 -05:00
Jeffrey Walton be437504c7 Clear "x" might be used before it is set using IBM XLC 2018-11-21 20:15:00 -05:00
Jeffrey Walton 5492101fc0
Fix XLC 13.1 debug builds on Linux 2018-11-21 17:37:19 -05:00
Jeffrey Walton 2caa62a066
Add TCXXFLAGS for compiler and cpu feature testing (GH #741) 
This will allow users to specify agreesive warning flags without accidentally failing a feature test. The feature tests are minimal but the system headers could be noisy under elevated warnings
 2018-11-21 16:25:34 -05:00
Jeffrey Walton 4db81f2eba
Improve -fPIC and -pthread rules 2018-11-21 15:16:55 -05:00
Jeffrey Walton 322c67f373
Use previous digest size as a default value in BLAKE2 2018-11-21 13:28:21 -05:00