889c98b9af
Add Newlib test
2018-11-17 15:50:04 -05:00
0c6dc33d2b
Fix missing header
2018-11-17 15:32:53 -05:00
0564266151
Cleanup makefile
2018-11-17 15:28:30 -05:00
b0f77fe7e3
Add additional tests
2018-11-17 15:09:36 -05:00
147983305a
Use __ALTIVEC__ preprocessor macro for PowerPC
2018-11-17 01:49:48 -05:00
c4c413e3f3
Drop GCM to POWER7 if POWER8 unavailable
2018-11-17 00:47:17 -05:00
bbc5c63d33
Drop GCM to POWER7 on PowerPC
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GCM can do some bulk XOR's using the SIMD unit. However, we still need loads and stores to be fast. Fast loads and stores of unaligned data requires the VSX unit
2018-11-17 00:41:49 -05:00
0ac7b25221
Use C++ compiler for all source files (PR #733 )
2018-11-15 19:13:28 -05:00
2d2f69c235
Fix missing cpu-features.o in shared object (PR #733 )
2018-11-15 19:11:29 -05:00
5ef276411c
Update documentation
2018-11-15 17:52:06 -05:00
4c5695c51b
Update documentation
2018-11-15 17:40:06 -05:00
f53405b995
Update documentation
2018-11-15 17:21:38 -05:00
cf52307abd
Update documentation
2018-11-15 16:59:11 -05:00
364017c097
Update documentation
2018-11-15 16:45:56 -05:00
dd111a6174
Update documentation
2018-11-15 16:23:21 -05:00
512fa101e8
Update documentation
2018-11-15 15:27:42 -05:00
f6e04e5f33
Rename PPC vector functions from VectorFunc to VecFunc
2018-11-15 15:17:49 -05:00
8e5cd3637e
Update documentation
2018-11-15 12:15:21 -05:00
98699dde05
Update documentation
2018-11-15 04:39:54 -05:00
8b4da4ca68
Update comments
2018-11-15 04:12:35 -05:00
e784c04eb0
Update documentation
2018-11-15 03:43:47 -05:00
89faf39228
Cleanup BLAKE2s
2018-11-15 03:35:39 -05:00
f69b7537f5
Update documentation
2018-11-15 03:27:23 -05:00
390fed72c5
Add word32 VectorStore overloads
2018-11-15 03:11:36 -05:00
10f85d6596
Make Altivec vector wraps friendly to downgrades
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The way the existing ppc_simd.h is written makes it hard to to switch between the old Altivec loads and stores and the new POWER7 loads and stores. This checkin rewrites the wrappers to use _ALTIVEC_, _ARCH_PWR7 and _ARCH_PWR8. The wrappers in this file now honor -maltivec, -mcpu-power7 and -mcpu=power8. It allows users to compile a source file, like chacha_simd.cpp, with a lower ISA and things just work for them.
2018-11-15 02:11:00 -05:00
3c7bdf1a26
Add Octet suffix for vec_sld
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We need to make room for packed shifts and rotates
2018-11-14 23:32:26 -05:00
d656545875
Remove duplicate functions
2018-11-14 23:20:03 -05:00
505c58acc1
Add Octet suffix for vec_sld
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We need to make room for packed shifts and rotates
2018-11-14 23:12:39 -05:00
fa8e692d84
Switch to compiler macros for PPC header
2018-11-14 22:59:17 -05:00
4f86bcc39d
Remove -qxlcompatmacros after Commit 96d3fa208e
2018-11-14 20:18:56 -05:00
96d3fa208e
Fix compile when using XLC with LLVM front-end without -qxlcompatmacros
2018-11-14 20:16:38 -05:00
7bd02896a0
Fix XLC flags with LLVM front-end
2018-11-14 20:01:05 -05:00
5b9b9b8d08
Whitespace check-in
2018-11-14 08:24:52 -05:00
7c9858f89c
Cleanup PowerPC and XLC feature tests
2018-11-14 08:19:39 -05:00
225ab6cb7b
Drop ChaCha requirements to POWER7
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This costs about 0.6 cpb (700 MB/s on GCC112), but it makes the faster algorithm available to more machines. In the future we may want to provide both POWER7 and POWER8
2018-11-14 08:19:13 -05:00
b3941a433d
Fix some IBM XL C/C++ issues
2018-11-13 23:39:39 -05:00
7f8d3e8882
Miscellaneos warning fixes (GH #739 )
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* Fix -pedantic warning in GCC.
* Fix -Wunused-private-field warning.
* Fix -Wkeyword-macro warning.
2018-11-13 22:04:03 -05:00
fc1e98e70d
Make feature test output filename configurable (PR #737 , GH #738 )
2018-11-13 14:02:40 -05:00
197f751831
Use Linux EOL conventions
2018-11-13 14:01:05 -05:00
00fc030fb4
Add test_pthreads.cxx to Filelist
2018-11-13 13:53:15 -05:00
926e91008b
Use Windows EOL conventions
2018-11-13 13:48:38 -05:00
69a00192b9
Add return value to pthread test function
2018-11-13 13:43:20 -05:00
dd6af58c98
Add pthreads test
2018-11-13 12:13:16 -05:00
e69106f257
Add "Invalid mnemonic" to bad result on PPC
2018-11-13 01:57:12 -05:00
27b61d8752
Add CRYPTOPP_INLINE to SIMON and SPECk for debugging
2018-11-13 00:02:34 -05:00
4da4f7ea2a
Add AVX2 arch to chacha_avx.cpp
2018-11-13 00:01:55 -05:00
57b2bf5708
Switch to VectorLoad overload with one arg
2018-11-12 23:38:46 -05:00
7515b4d661
Fix SIMON64 and SPECK64 providers
2018-11-12 22:03:26 -05:00
9550ccc9a3
Port SIMON64 to Altivec
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SIMON64 runs about 4x faster than C++ for POWER4 and friends. If POWER7 is available it goes back to full speed due to efficient unaligned loads
2018-11-12 21:51:11 -05:00
a0608a6b80
Port SPECK64 to Altivec
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SPECK64 runs about 4x faster than C++ for POWER4 and friends. If POWER7 is available it goes back to full speed due to efficient unaligned loads
2018-11-12 20:56:15 -05:00
Jeffrey Walton
Blue
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